# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
# ChangeSet 1.1069.43.5+1.1069.28.3 -> 1.1069.45.1
# drivers/char/agp/agpgart_be.c 1.35.1.14 -> 1.41.1.21
# drivers/char/Config.in 1.36.1.22 -> 1.39.1.13
# include/asm-ppc/pgtable.h 1.18.1.4 -> 1.22
# drivers/pci/pci.c 1.36.1.10 -> 1.38.1.7
# include/linux/pci_ids.h 1.44.1.32 -> 1.46.1.21
# include/asm-i386/pci.h 1.16.1.1 -> 1.18
# drivers/char/agp/agp.h 1.18.1.7 -> 1.26
# include/linux/agp_backend.h 1.13.1.8 -> 1.22
# Documentation/Configure.help 1.162.11.2 -> 1.166.1.14
#
diff -Nru a/Documentation/Configure.help b/Documentation/Configure.help
--- a/Documentation/Configure.help Thu Oct 9 15:19:35 2003
+++ b/Documentation/Configure.help Thu Oct 9 15:19:35 2003
@@ -18171,6 +18171,11 @@
purpose port, say Y here. See
<http://www.dig64.org/specifications/DIG64_HCDPv10a_01.pdf>.
+Support for serial ports defined in ACPI namespace
+CONFIG_SERIAL_ACPI
+ If you wish to enable serial port discovery via the ACPI
+ namespace, say Y here. If unsure, say N.
+
Support for PowerMac serial ports
CONFIG_MAC_SERIAL
If you have Macintosh style serial ports (8 pin mini-DIN), say Y
diff -Nru a/drivers/char/Config.in b/drivers/char/Config.in
--- a/drivers/char/Config.in Thu Oct 9 15:19:35 2003
+++ b/drivers/char/Config.in Thu Oct 9 15:19:35 2003
@@ -24,6 +24,9 @@
tristate ' Atomwide serial port support' CONFIG_ATOMWIDE_SERIAL
tristate ' Dual serial port support' CONFIG_DUALSP_SERIAL
fi
+ if [ "$CONFIG_ACPI" = "y" ]; then
+ bool ' Support for serial ports defined in ACPI namespace' CONFIG_SERIAL_ACPI
+ fi
fi
dep_mbool 'Extended dumb serial driver options' CONFIG_SERIAL_EXTENDED $CONFIG_SERIAL
if [ "$CONFIG_SERIAL_EXTENDED" = "y" ]; then
diff -Nru a/drivers/char/agp/agpgart_be.c b/drivers/char/agp/agpgart_be.c
--- a/drivers/char/agp/agpgart_be.c Thu Oct 9 15:19:35 2003
+++ b/drivers/char/agp/agpgart_be.c Thu Oct 9 15:19:35 2003
@@ -45,6 +45,7 @@
#include <linux/pagemap.h>
#include <linux/miscdevice.h>
#include <linux/pm.h>
+#include <linux/acpi.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
@@ -214,10 +215,14 @@
agp_bridge.free_by_type(curr);
return;
}
- if (curr->page_count != 0) {
- for (i = 0; i < curr->page_count; i++) {
- agp_bridge.agp_destroy_page((unsigned long)
- phys_to_virt(curr->memory[i]));
+ if (agp_bridge.cant_use_aperture) {
+ vfree(curr->vmptr);
+ } else {
+ if (curr->page_count != 0) {
+ for (i = 0; i < curr->page_count; i++) {
+ agp_bridge.agp_destroy_page((unsigned long)
+ phys_to_virt(curr->memory[i]));
+ }
}
}
agp_free_key(curr->key);
@@ -226,6 +231,8 @@
MOD_DEC_USE_COUNT;
}
+#define IN_VMALLOC(_x) (((_x) >= VMALLOC_START) && ((_x) < VMALLOC_END))
+
#define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
agp_memory *agp_allocate_memory(size_t page_count, u32 type)
@@ -260,18 +267,43 @@
MOD_DEC_USE_COUNT;
return NULL;
}
- for (i = 0; i < page_count; i++) {
- new->memory[i] = agp_bridge.agp_alloc_page();
- if (new->memory[i] == 0) {
- /* Free this structure */
- agp_free_memory(new);
+ if (agp_bridge.cant_use_aperture) {
+ void *vmblock;
+ unsigned long vaddr;
+ struct page *page;
+
+ vmblock = __vmalloc(page_count << PAGE_SHIFT, GFP_KERNEL, PAGE_KERNEL);
+ if (vmblock == NULL) {
+ MOD_DEC_USE_COUNT;
return NULL;
}
- new->memory[i] = virt_to_phys((void *) new->memory[i]);
- new->page_count++;
- }
+ new->vmptr = vmblock;
+ vaddr = (unsigned long) vmblock;
+ for (i = 0; i < page_count; i++, vaddr += PAGE_SIZE) {
+ page = vmalloc_to_page((void *) vaddr);
+ if (!page) {
+ MOD_DEC_USE_COUNT;
+ return NULL;
+ }
+ new->memory[i] = virt_to_phys(page_address(page));
+ }
+
+ new->page_count = page_count;
+ } else {
+ for (i = 0; i < page_count; i++) {
+ new->memory[i] = agp_bridge.agp_alloc_page();
+
+ if (new->memory[i] == 0) {
+ /* Free this structure */
+ agp_free_memory(new);
+ return NULL;
+ }
+ new->memory[i] = virt_to_phys((void *) new->memory[i]);
+ new->page_count++;
+ }
+ }
return new;
}
@@ -284,26 +316,18 @@
temp = agp_bridge.current_size;
- switch (agp_bridge.size_type) {
- case U8_APER_SIZE:
+ if (agp_bridge.size_type == U8_APER_SIZE)
current_size = A_SIZE_8(temp)->size;
- break;
- case U16_APER_SIZE:
+ else if (agp_bridge.size_type == U16_APER_SIZE)
current_size = A_SIZE_16(temp)->size;
- break;
- case U32_APER_SIZE:
+ else if (agp_bridge.size_type == U32_APER_SIZE)
current_size = A_SIZE_32(temp)->size;
- break;
- case LVL2_APER_SIZE:
+ else if (agp_bridge.size_type == LVL2_APER_SIZE)
current_size = A_SIZE_LVL2(temp)->size;
- break;
- case FIXED_APER_SIZE:
+ else if (agp_bridge.size_type == FIXED_APER_SIZE)
current_size = A_SIZE_FIX(temp)->size;
- break;
- default:
+ else
current_size = 0;
- break;
- }
current_size -= (agp_memory_reserved / (1024*1024));
@@ -312,6 +336,9 @@
/* Routine to copy over information structure */
+/* AGP bridge need not be PCI device, but DRM thinks it is. */
+static struct pci_dev fake_bridge_dev;
+
int agp_copy_info(agp_kern_info * info)
{
memset(info, 0, sizeof(agp_kern_info));
@@ -321,7 +348,7 @@
}
info->version.major = agp_bridge.version->major;
info->version.minor = agp_bridge.version->minor;
- info->device = agp_bridge.dev;
+ info->device = agp_bridge.dev ? agp_bridge.dev : &fake_bridge_dev;
info->chipset = agp_bridge.type;
info->mode = agp_bridge.mode;
info->aper_base = agp_bridge.gart_bus_addr;
@@ -395,97 +422,104 @@
/* Generic Agp routines - Start */
-static void agp_generic_agp_enable(u32 mode)
+static u32 agp_collect_device_status(u32 mode, u32 command)
{
- struct pci_dev *device = NULL;
- u32 command, scratch;
- u8 cap_ptr;
+ struct pci_dev *device;
+ u8 agp;
+ u32 scratch;
- pci_read_config_dword(agp_bridge.dev,
- agp_bridge.capndx + 4,
- &command);
+ pci_for_each_dev(device) {
+ agp = pci_find_capability(device, PCI_CAP_ID_AGP);
+ if (!agp)
+ continue;
- /*
- * PASS1: go throu all devices that claim to be
- * AGP devices and collect their data.
- */
+ /*
+ * Ok, here we have a AGP device. Disable impossible
+ * settings, and adjust the readqueue to the minimum.
+ */
+ pci_read_config_dword(device, agp + PCI_AGP_STATUS, &scratch);
+ /* adjust RQ depth */
+ command =
+ ((command & ~0xff000000) |
+ min_t(u32, (mode & 0xff000000),
+ min_t(u32, (command & 0xff000000),
+ (scratch & 0xff000000))));
+
+ /* disable SBA if it's not supported */
+ if (!((command & 0x00000200) &&
+ (scratch & 0x00000200) &&
+ (mode & 0x00000200)))
+ command &= ~0x00000200;
+
+ /* disable FW if it's not supported */
+ if (!((command & 0x00000010) &&
+ (scratch & 0x00000010) &&
+ (mode & 0x00000010)))
+ command &= ~0x00000010;
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00) {
- /*
- * Ok, here we have a AGP device. Disable impossible
- * settings, and adjust the readqueue to the minimum.
- */
-
- pci_read_config_dword(device, cap_ptr + 4, &scratch);
-
- /* adjust RQ depth */
- command =
- ((command & ~0xff000000) |
- min_t(u32, (mode & 0xff000000),
- min_t(u32, (command & 0xff000000),
- (scratch & 0xff000000))));
-
- /* disable SBA if it's not supported */
- if (!((command & 0x00000200) &&
- (scratch & 0x00000200) &&
- (mode & 0x00000200)))
- command &= ~0x00000200;
-
- /* disable FW if it's not supported */
- if (!((command & 0x00000010) &&
- (scratch & 0x00000010) &&
- (mode & 0x00000010)))
- command &= ~0x00000010;
-
- if (!((command & 4) &&
- (scratch & 4) &&
- (mode & 4)))
- command &= ~0x00000004;
-
- if (!((command & 2) &&
- (scratch & 2) &&
- (mode & 2)))
- command &= ~0x00000002;
-
- if (!((command & 1) &&
- (scratch & 1) &&
- (mode & 1)))
- command &= ~0x00000001;
- }
+ if (!((command & 4) &&
+ (scratch & 4) &&
+ (mode & 4)))
+ command &= ~0x00000004;
+
+ if (!((command & 2) &&
+ (scratch & 2) &&
+ (mode & 2)))
+ command &= ~0x00000002;
+
+ if (!((command & 1) &&
+ (scratch & 1) &&
+ (mode & 1)))
+ command &= ~0x00000001;
}
- /*
- * PASS2: Figure out the 4X/2X/1X setting and enable the
- * target (our motherboard chipset).
- */
- if (command & 4) {
+ if (command & 4)
command &= ~3; /* 4X */
+ if (command & 2)
+ command &= ~5; /* 2X (8X for AGP3.0) */
+ if (command & 1)
+ command &= ~6; /* 1X (4X for AGP3.0) */
+
+ return command;
+}
+
+static void agp_device_command(u32 command, int agp_v3)
+{
+ struct pci_dev *device;
+ int mode;
+
+ mode = command & 0x7;
+ if (agp_v3)
+ mode *= 4;
+
+ pci_for_each_dev(device) {
+ u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
+ if (!agp)
+ continue;
+
+ printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
+ agp_v3 ? 3 : 2, device->slot_name, mode);
+ pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
}
- if (command & 2) {
- command &= ~5; /* 2X */
- }
- if (command & 1) {
- command &= ~6; /* 1X */
- }
+}
+
+static void agp_generic_agp_enable(u32 mode)
+{
+ u32 command;
+
+ pci_read_config_dword(agp_bridge.dev,
+ agp_bridge.capndx + PCI_AGP_STATUS,
+ &command);
+
+ command = agp_collect_device_status(mode, command);
command |= 0x00000100;
pci_write_config_dword(agp_bridge.dev,
- agp_bridge.capndx + 8,
+ agp_bridge.capndx + PCI_AGP_COMMAND,
command);
- /*
- * PASS3: Go throu all AGP devices and update the
- * command registers.
- */
-
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00)
- pci_write_config_dword(device, cap_ptr + 8, command);
- }
+ agp_device_command(command, 0);
}
static int agp_generic_create_gatt_table(void)
@@ -3638,7 +3672,6 @@
struct pci_dev *device = NULL;
u32 command, scratch;
u8 cap_ptr;
- u8 agp_v3;
u8 v3_devs=0;
/* FIXME: If 'mode' is x1/x2/x4 should we call the AGPv2 routines directly ?
@@ -3671,77 +3704,14 @@
}
- pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + 4, &command);
-
- /*
- * PASS2: go through all devices that claim to be
- * AGP devices and collect their data.
- */
-
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00) {
- /*
- * Ok, here we have a AGP device. Disable impossible
- * settings, and adjust the readqueue to the minimum.
- */
-
- printk (KERN_INFO "AGP: Setting up AGPv3 capable device at %d:%d:%d\n",
- device->bus->number, PCI_FUNC(device->devfn), PCI_SLOT(device->devfn));
- pci_read_config_dword(device, cap_ptr + 4, &scratch);
- agp_v3 = (scratch & (1<<3) ) >>3;
-
- /* adjust RQ depth */
- command =
- ((command & ~0xff000000) |
- min_t(u32, (mode & 0xff000000),
- min_t(u32, (command & 0xff000000),
- (scratch & 0xff000000))));
-
- /* disable SBA if it's not supported */
- if (!((command & 0x200) && (scratch & 0x200) && (mode & 0x200)))
- command &= ~0x200;
-
- /* disable FW if it's not supported */
- if (!((command & 0x10) && (scratch & 0x10) && (mode & 0x10)))
- command &= ~0x10;
-
- if (!((command & 2) && (scratch & 2) && (mode & 2))) {
- command &= ~2; /* 8x */
- printk (KERN_INFO "AGP: Putting device into 8x mode\n");
- }
-
- if (!((command & 1) && (scratch & 1) && (mode & 1))) {
- command &= ~1; /* 4x */
- printk (KERN_INFO "AGP: Putting device into 4x mode\n");
- }
- }
- }
- /*
- * PASS3: Figure out the 8X/4X setting and enable the
- * target (our motherboard chipset).
- */
-
- if (command & 2)
- command &= ~5; /* 8X */
-
- if (command & 1)
- command &= ~6; /* 4X */
+ pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + PCI_AGP_STATUS, &command);
+ command = agp_collect_device_status(mode, command);
command |= 0x100;
- pci_write_config_dword(agp_bridge.dev, agp_bridge.capndx + 8, command);
-
- /*
- * PASS4: Go through all AGP devices and update the
- * command registers.
- */
+ pci_write_config_dword(agp_bridge.dev, agp_bridge.capndx + PCI_AGP_COMMAND, command);
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00)
- pci_write_config_dword(device, cap_ptr + 8, command);
- }
+ agp_device_command(command, 1);
}
@@ -4456,7 +4426,7 @@
/* Fill in the mode register */
pci_read_config_dword(serverworks_private.svrwrks_dev,
- agp_bridge.capndx + 4,
+ agp_bridge.capndx + PCI_AGP_STATUS,
&agp_bridge.mode);
pci_read_config_byte(agp_bridge.dev,
@@ -4606,104 +4576,23 @@
static void serverworks_agp_enable(u32 mode)
{
- struct pci_dev *device = NULL;
- u32 command, scratch, cap_id;
- u8 cap_ptr;
+ u32 command;
pci_read_config_dword(serverworks_private.svrwrks_dev,
- agp_bridge.capndx + 4,
+ agp_bridge.capndx + PCI_AGP_STATUS,
&command);
- /*
- * PASS1: go throu all devices that claim to be
- * AGP devices and collect their data.
- */
-
-
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00) {
- do {
- pci_read_config_dword(device,
- cap_ptr, &cap_id);
-
- if ((cap_id & 0xff) != 0x02)
- cap_ptr = (cap_id >> 8) & 0xff;
- }
- while (((cap_id & 0xff) != 0x02) && (cap_ptr != 0x00));
- }
- if (cap_ptr != 0x00) {
- /*
- * Ok, here we have a AGP device. Disable impossible
- * settings, and adjust the readqueue to the minimum.
- */
-
- pci_read_config_dword(device, cap_ptr + 4, &scratch);
-
- /* adjust RQ depth */
- command =
- ((command & ~0xff000000) |
- min_t(u32, (mode & 0xff000000),
- min_t(u32, (command & 0xff000000),
- (scratch & 0xff000000))));
-
- /* disable SBA if it's not supported */
- if (!((command & 0x00000200) &&
- (scratch & 0x00000200) &&
- (mode & 0x00000200)))
- command &= ~0x00000200;
-
- /* disable FW */
- command &= ~0x00000010;
-
- command &= ~0x00000008;
-
- if (!((command & 4) &&
- (scratch & 4) &&
- (mode & 4)))
- command &= ~0x00000004;
-
- if (!((command & 2) &&
- (scratch & 2) &&
- (mode & 2)))
- command &= ~0x00000002;
-
- if (!((command & 1) &&
- (scratch & 1) &&
- (mode & 1)))
- command &= ~0x00000001;
- }
- }
- /*
- * PASS2: Figure out the 4X/2X/1X setting and enable the
- * target (our motherboard chipset).
- */
+ command = agp_collect_device_status(mode, command);
- if (command & 4) {
- command &= ~3; /* 4X */
- }
- if (command & 2) {
- command &= ~5; /* 2X */
- }
- if (command & 1) {
- command &= ~6; /* 1X */
- }
+ command &= ~0x00000010; /* disable FW */
+ command &= ~0x00000008;
command |= 0x00000100;
pci_write_config_dword(serverworks_private.svrwrks_dev,
- agp_bridge.capndx + 8,
+ agp_bridge.capndx + PCI_AGP_COMMAND,
command);
- /*
- * PASS3: Go throu all AGP devices and update the
- * command registers.
- */
-
- pci_for_each_dev(device) {
- cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
- if (cap_ptr != 0x00)
- pci_write_config_dword(device, cap_ptr + 8, command);
- }
+ agp_device_command(command, 0);
}
static int __init serverworks_setup (struct pci_dev *pdev)
@@ -6450,7 +6339,6 @@
"IGP9100/M",
ati_generic_setup },
#endif /* CONFIG_AGP_ATI */
-
{ 0, }, /* dummy final entry, always present */
};
@@ -6533,6 +6421,18 @@
return -ENODEV;
}
+static int agp_check_supported_device(struct pci_dev *dev) {
+
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE (agp_bridge_info); i++) {
+ if (dev->vendor == agp_bridge_info[i].vendor_id &&
+ dev->device == agp_bridge_info[i].device_id)
+ return 1;
+ }
+
+ return 0;
+}
/* Supported Device Scanning routine */
@@ -6546,8 +6446,14 @@
return 0;
#endif
- if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) == NULL)
- return -ENODEV;
+ /*
+ * Some systems have multiple host bridges, so
+ * we can't just use the first one we find.
+ */
+ do {
+ if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev)) == NULL)
+ return -ENODEV;
+ } while (!agp_check_supported_device(dev));
agp_bridge.dev = dev;
@@ -6852,7 +6758,7 @@
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev,
- agp_bridge.capndx + 4,
+ agp_bridge.capndx + PCI_AGP_STATUS,
&agp_bridge.mode);
/* probe for known chipsets */
@@ -7070,7 +6976,8 @@
inter_module_register("drm_agp", THIS_MODULE, &drm_agp);
- pm_register(PM_PCI_DEV, PM_PCI_ID(agp_bridge.dev), agp_power);
+ if (agp_bridge.dev)
+ pm_register(PM_PCI_DEV, PM_PCI_ID(agp_bridge.dev), agp_power);
return 0;
}
diff -Nru a/drivers/pci/pci.c b/drivers/pci/pci.c
--- a/drivers/pci/pci.c Thu Oct 9 15:19:35 2003
+++ b/drivers/pci/pci.c Thu Oct 9 15:19:35 2003
@@ -921,7 +921,7 @@
*
* RETURNS: An appriopriate -ERRNO error value on eror, or zero for success.
*/
-int
+static int
pci_generic_prep_mwi(struct pci_dev *dev)
{
u8 cacheline_size;
@@ -1061,8 +1061,14 @@
{
unsigned int pos, reg, next;
u32 l, sz;
+ u16 cmd;
struct resource *res;
+ /* Disable I/O & memory decoding while we size the BARs. */
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ pci_write_config_word(dev, PCI_COMMAND,
+ cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
+
for(pos=0; pos<howmany; pos = next) {
next = pos+1;
res = &dev->resource[pos];
@@ -1127,13 +1133,16 @@
if (sz && sz != 0xffffffff) {
sz = pci_size(l, sz, PCI_ROM_ADDRESS_MASK);
if (!sz)
- return;
+ goto out;
res->flags = (l & PCI_ROM_ADDRESS_ENABLE) |
IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
res->start = l & PCI_ROM_ADDRESS_MASK;
res->end = res->start + (unsigned long) sz;
}
}
+
+out:
+ pci_write_config_word(dev, PCI_COMMAND, cmd);
}
void __devinit pci_read_bridge_bases(struct pci_bus *child)
@@ -2066,16 +2075,16 @@
int map, block;
if ((page = pool_find_page (pool, dma)) == 0) {
- printk (KERN_ERR "pci_pool_free %s/%s, %p/%x (bad dma)\n",
+ printk (KERN_ERR "pci_pool_free %s/%s, %p/%lx (bad dma)\n",
pool->dev ? pool->dev->slot_name : NULL,
- pool->name, vaddr, (int) (dma & 0xffffffff));
+ pool->name, vaddr, (unsigned long) dma);
return;
}
#ifdef CONFIG_PCIPOOL_DEBUG
if (((dma - page->dma) + (void *)page->vaddr) != vaddr) {
- printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%x\n",
+ printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%lx\n",
pool->dev ? pool->dev->slot_name : NULL,
- pool->name, vaddr, (int) (dma & 0xffffffff));
+ pool->name, vaddr, (unsigned long) dma);
return;
}
#endif
@@ -2164,7 +2173,6 @@
EXPORT_SYMBOL(pci_set_master);
EXPORT_SYMBOL(pci_set_mwi);
EXPORT_SYMBOL(pci_clear_mwi);
-EXPORT_SYMBOL(pci_generic_prep_mwi);
EXPORT_SYMBOL(pci_set_dma_mask);
EXPORT_SYMBOL(pci_dac_set_dma_mask);
EXPORT_SYMBOL(pci_assign_resource);
diff -Nru a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
--- a/include/asm-ppc/pgtable.h Thu Oct 9 15:19:35 2003
+++ b/include/asm-ppc/pgtable.h Thu Oct 9 15:19:35 2003
@@ -574,6 +574,11 @@
pte_update(ptep, 0, _PAGE_DIRTY);
}
+/*
+ * Macro to mark a page protection value as "uncacheable".
+ */
+#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
+
#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
#define pmd_page(pmd) (pmd_val(pmd))
diff -Nru a/include/linux/agp_backend.h b/include/linux/agp_backend.h
--- a/include/linux/agp_backend.h Thu Oct 9 15:19:35 2003
+++ b/include/linux/agp_backend.h Thu Oct 9 15:19:35 2003
@@ -142,6 +142,7 @@
size_t page_count;
int num_scratch_pages;
unsigned long *memory;
+ void *vmptr;
off_t pg_start;
u32 type;
u32 physical;